I am going to do bad on my hardware Acrh homework, because the questions are stupied stuff we never adressed in class, like: "change the DLX pipe line from 5 to 4 cycles by combine the fetch and decode stages and making the clock 50% longer, how much faseter was the old machine than the new one?" Man what do I have to figure out every instance there could be a hazard and see how many stalls there are compared to the old machine? Is there a formaula for this or do you just guess the answer? Man this is lame stuff I prefered the prerequestite class better, much more straight forward than this stuff is.

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